Silicon Sensing’s glass interposer process (GIP) offers high reliability derived from the wafer level packaging process gained through mass production of its CRG20 Capacitive MEMS Gyro (VSG4), plus a low-cost glass blasting process compared to a conventional Through-Silicon Via (TSV) process.
Structure of the CRG20
Glass Interposer Specification
Comparison between TSV and GIP
TSV Process
Glass Interposer Process
1. Silicon deep RIE process
1. Surface glass blast process
2. Insulate wafer (Heat oxidation or CVD)
2. Back surface glass blast process
3. Seed layer formed (Sputtering)
3. Surface electrode fomed
4. Metal Plating
4. Back surface electrode formed
5.Chemical Mechanical Polishing
5. Electrode patterning (Wet etching)
6. Surface electrode formed
7. Surface electrode patterning (Etching)
8. Back surface electrode formed
9. Back surface electrode patterning (Etching)
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